Vice President with Goldman Sachs & Co. LLC in New York, NY
Duties: Vice President with Goldman Sachs & Co. LLC in New York, NY. Trading Platform Strats are responsible for building order management and exchange connectivity platforms for listed Options and Equities. They gather requirements, research, design, implement, test, support, and monitor trading strategies’ performance on these trading platforms. The team is accountable for the platform’s architecture evolution to meet the evolving needs of different business lines with agile software development and deployment. Design, build and maintain a high-performance, high-availability, high-capacity, yet nimble and adaptive platform for order management and exchange connectivity in Equities and Options markets. Use data to guide decision-making, developing or enhancing tools as necessary to collect it. Understand North American market rules, regulations, exchange service offerings and implement changes to these on an on-going basis. Communicate with traders, sales, clients and compliance officers about new feature requests, explanation of existing features. Mentor junior colleagues on the team by providing technical direction with their projects. Research and provide strategic direction to the firm's Direct Market Access offering with changing market regulations and financial microstructure.
Job Requirements: Bachelor’s degree (U.S. or foreign equivalent) in Computer Science, Computer Engineering, Electronic Engineering or related field. Minimum five (5) years of experience in the job offered or in a related role. Prior experience must include five (5) years with: Writing latency sensitive code in C++ or Java; Data Structures & Algorithms; working with SQL and NoSQL databases and messaging infrastructures including MongoDB and Kafka; and working through the full Software Development Lifecycle (SDLC) and using CI/CD and building Tools including Gradle, Jenkins, Apache FTL (Freemarker Templating Language), Git and SVN. Prior experience must include three (3) years with: Low Latency Performance Tuning for RHEL7 Linux using profiling tools for performance analysis; computer Architecture Foundations, including Broadwell, Skylake, and Cascade Lake, Memory Architectures, Management; Caching and Operating System fundamentals; working with US Equities and Options Exchange Protocols including FIX, Pillar, Ouch, BOE, OTTO, and UGW; network layer programming and network level protocols including TCP, UDP, Multicast and Kernel Bypass (Solarflare Onload); and debugging issues using GDB, Valgrind, Massif and deciphering x86 assembly and compilers. Prior experience must include two (2) years with: Writing C++ libraries to interface with Field-programmable gate arrays (FPGAs).
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